riscv: rvck_defconfig: enable VFIO support - #352

dist inclusion
category: cleanup
Link: RVCK-Project#252

--------------------------------

This reverts commit 9898f99.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

dist inclusion
category: bugfix
Link: RVCK-Project#258

--------------------------------

Commit 3d4a329 ("Revert chore: use xuantie instead of thead")
removed the source line for drivers/clk/xuantie/Kconfig but did not
add back the source line for drivers/clk/thead/Kconfig.

This causes CONFIG_CLK_TH1520_FM to be unavailable in menuconfig,
which leads to clock driver not being built and boot failures on
TH1520 boards.

Fixes: 3d4a329 ("Revert chore: use xuantie instead of thead")
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

dist inclusion
category: bugfix
Link: RVCK-Project#258

--------------------------------

The openEuler OpenSBI firmware looks for "xuantie,th1520-aon" compatible
string and requires the "opensbi-mboxes" property to initialize the AON
subsystem for CPU hotplug and suspend-to-RAM functionality.

After the revert commit 3d4a329, the aon node only has
"thead,th1520-aon" compatible which causes OpenSBI to fail with:
  "aon node not found in FDT"

This patch fixes the aon node by:
1. Adding "xuantie,th1520-aon" compatible for OpenSBI compatibility
2. Adding "opensbi-mboxes" property pointing to mbox_910r
3. Adding third parameter to mboxes for proper mailbox channel config
4. Adding status = "okay" to enable the node

Fixes: 3d4a329 ("Revert chore: use xuantie instead of thead")
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

dist inclusion
category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit 2e4869d.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

dist inclusion
category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit 61085f0.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

dist inclusion
category: cleanup
Link: RVCK-Project#235

--------------------------------

This reverts commit f57b43b.

Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from Linux 7.0-rc3
commit 30e7573
category: feature
bugzilla: RVCK-Project#236

--------------------------------

Add a YAML schema for the T-HEAD TH1520 SoC reset controller. This
controller manages resets for subsystems such as the GPU within the
TH1520 SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Link: https://lore.kernel.org/r/20250303152511.494405-2-m.wilczynski@samsung.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from Linux 7.0-rc3
commit 4a65326
category: feature
bugzilla: RVCK-Project#236

--------------------------------

Add reset controller driver for the T-HEAD TH1520 SoC that manages
hardware reset lines for various subsystems. The driver currently
implements support for GPU reset control, with infrastructure in place
to extend support for NPU and Watchdog Timer resets in future updates.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Link: https://lore.kernel.org/r/20250303152511.494405-3-m.wilczynski@samsung.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from Linux 7.0-rc3
commit cf5e81d
category: feature
bugzilla: RVCK-Project#236

--------------------------------

Add the "gpu-clkgen" reset property to the AON device tree node. This
allows the AON power domain driver to detect the capability to power
sequence the GPU and spawn the necessary pwrseq-thead-gpu auxiliary
driver for managing the GPU's complex power sequence.

This commit also adds the prerequisite
dt-bindings/reset/thead,th1520-reset.h include to make the
TH1520_RESET_ID_GPU_CLKGEN available. This include was previously
dropped during a conflict resolution [1].

Link: https://lore.kernel.org/all/aAvfn2mq0Ksi8DF2@x1/ [1]

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Signed-off-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Signed-off-by: ZhenXing Zhu <zhenxing.zhu@linux.alibaba.com>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.7-rc8
commit 683c5bb
category: feature
bugzilla: RVCK-Project#256

--------------------------------

ENTRY()/END()/WEAK() macros are deprecated and we should make use of the
new SYM_*() macros [1] for better annotation of symbols. Replace the
deprecated ones with the new ones and fix wrong usage of END()/ENDPROC()
to correctly describe the symbols.

[1] https://docs.kernel.org/core-api/asm-annotations.html

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.7-rc8
commit e5ff012
category: feature
bugzilla: RVCK-Project#256

--------------------------------

For the sake of coherency, use local labels in assembly when
applicable. This also avoid kprobes being confused when applying a
kprobe since the size of function is computed by checking where the
next visible symbol is located. This might end up in computing some
function size to be way shorter than expected and thus failing to apply
kprobes to the specified offset.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.11
commit 1a74833
category: feature
bugzilla: RVCK-Project#256

--------------------------------

Currently, userstacktrace is unsupported for riscv. So use the
perf_callchain_user() code as blueprint to implement the
arch_stack_walk_user() which add userstacktrace support on riscv.
Meanwhile, we can use arch_stack_walk_user() to simplify the implementation
of perf_callchain_user().

A ftrace test case is shown as below:

	# cd /sys/kernel/debug/tracing
	# echo 1 > options/userstacktrace
	# echo 1 > options/sym-userobj
	# echo 1 > events/sched/sched_process_fork/enable
	# cat trace
	......
	            bash-178     [000] ...1.    97.968395: sched_process_fork: comm=bash pid=178 child_comm=bash child_pid=231
	            bash-178     [000] ...1.    97.970075: <user stack trace>
	 => /lib/libc.so.6[+0xb5090]

Also a simple perf test is ok as below:

	# perf record -e cpu-clock --call-graph fp top
	# perf report --call-graph

	.....
	[[31m  66.54%[[m     0.00%  top      [kernel.kallsyms]            [k] ret_from_exception
            |
            ---ret_from_exception
               |
               |--[[31m58.97%[[m--do_trap_ecall_u
               |          |
               |          |--[[31m17.34%[[m--__riscv_sys_read
               |          |          ksys_read
               |          |          |
               |          |           --[[31m16.88%[[m--vfs_read
               |          |                     |
               |          |                     |--[[31m10.90%[[m--seq_read

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Tested-by: Jinjie Ruan <ruanjinjie@huawei.com>
Cc: Björn Töpel <bjorn@kernel.org>
Link: https://lore.kernel.org/r/20240708032847.2998158-3-ruanjinjie@huawei.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit 5bb5ccb
category: feature
bugzilla: RVCK-Project#256

--------------------------------

Introduce basic guest support in perf, enabling it to distinguish
between PMU interrupts in the host or guest, and collect
fundamental information.

Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/a67d527dc1b11493fe11f7f53584772fdd983744.1728957131.git.zhouquan@iscas.ac.cn
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit eded675
category: feature
bugzilla: RVCK-Project#256

--------------------------------

For the information collected on the host side, we need to
identify which data originates from the guest and record
these events separately, this can be achieved by having
KVM register perf callbacks.

Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/00342d535311eb0629b9ba4f1e457a48e2abee33.1728957131.git.zhouquan@iscas.ac.cn
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit e403a90
category: feature
bugzilla: RVCK-Project#256

--------------------------------

Order the object files alphabetically in the Makefile so that
it is very predictable inserting new object files in the future.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-2-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit b6114a7
category: feature
bugzilla: RVCK-Project#256

--------------------------------

We will be optimizing HSTATUS CSR access via shared memory setup
using the SBI nested acceleration extension. To facilitate this,
we first move HSTATUS save/restore in kvm_riscv_vcpu_enter_exit().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-3-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit b922307
category: feature
bugzilla: RVCK-Project#256

--------------------------------

The SCOUNTEREN CSR need not be saved/restored in the low-level
__kvm_riscv_switch_to() function hence move the SCOUNTEREN CSR
save/restore to the kvm_riscv_vcpu_swap_in_guest_state() and
kvm_riscv_vcpu_swap_in_host_state() functions in C sources.

Also, re-arrange the CSR save/restore and related GPR usage in
the low-level __kvm_riscv_switch_to() low-level function.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-4-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit 8f57ada
category: feature
bugzilla: RVCK-Project#256

--------------------------------

Break down the __kvm_riscv_switch_to() function into macros so that
these macros can be later re-used by SBI NACL extension based low-level
switch function.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-5-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit 5d8f7ee
category: feature
bugzilla: RVCK-Project#256

--------------------------------

The aia_set_hvictl() internally writes the HVICTL CSR which makes
it difficult to optimize the CSR write using SBI NACL extension for
kvm_riscv_vcpu_aia_update_hvip() function so replace aia_set_hvictl()
with new aia_hvictl_value() which only computes the HVICTL value.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-6-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit 15ff2ff
category: feature
bugzilla: RVCK-Project#256

--------------------------------

No need to setup SGEI local interrupt when there are zero guest
external interrupts (i.e. zero HW IMSIC guest files).

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-7-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit 5daf89e
category: feature
bugzilla: RVCK-Project#256

--------------------------------

Add defines for the new SBI nested acceleration extension which was
ratified as part of the SBI v2.0 specification.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-8-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit d466c19
category: feature
bugzilla: RVCK-Project#256

--------------------------------

Add a common nested acceleration support which will be shared by
all parts of KVM RISC-V. This nested acceleration support detects
and enables SBI NACL extension usage based on static keys which
ensures minimum impact on the non-nested scenario.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-9-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit e28e6b6
category: feature
bugzilla: RVCK-Project#256

--------------------------------

When running under some other hypervisor, prefer nacl_csr_xyz()
for accessing H-extension CSRs in the run-loop. This makes CSR
access faster whenever SBI nested acceleration is available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-10-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit dab5560
category: feature
bugzilla: RVCK-Project#256

--------------------------------

When running under some other hypervisor, prefer nacl_csr_xyz()
for accessing AIA CSRs in the run-loop. This makes CSR access
faster whenever SBI nested acceleration is available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-11-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit 68c72a6
category: feature
bugzilla: RVCK-Project#256

--------------------------------

Implement an optimized KVM world-switch using SBI sync SRET call
when SBI nested acceleration extension is available. This improves
KVM world-switch when KVM RISC-V is running as a Guest under some
other hypervisor.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-12-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit 3e7d154
category: feature
bugzilla: RVCK-Project#256

--------------------------------

Save trap CSRs in the kvm_riscv_vcpu_enter_exit() function instead of
the kvm_arch_vcpu_ioctl_run() function so that HTVAL and HTINST CSRs
are accessed in more optimized manner while running under some other
hypervisor.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-13-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.12-rc6
commit 5bdecd8
category: feature
bugzilla: RVCK-Project#256

--------------------------------

When running under some other hypervisor, use SBI NACL based HFENCEs
for TLB shoot-down via KVM requests. This makes HFENCEs faster whenever
SBI nested acceleration is available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-14-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.10-rc1
commit 197bd23
category: feature
bugzilla: RVCK-Project#263

--------------------------------

'vlenb', added to riscv_v_ext_state by commit c35f3aa ("RISC-V:
vector: export VLENB csr in __sc_riscv_v_state"), isn't being
initialized in guest_context. If we export 'vlenb' as a KVM CSR,
something we want to do in the next patch, it'll always return 0.

Set 'vlenb' to riscv_v_size/32.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Wang Yechao <wang.yechao255@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

mainline inclusion
from mainline-6.10-rc1
commit 2fa2903
category: feature
bugzilla: RVCK-Project#263

--------------------------------

Userspace requires 'vlenb' to be able to encode it in reg ID. Otherwise
it is not possible to retrieve any vector reg since we're returning
EINVAL if reg_size isn't vlenb (see kvm_riscv_vcpu_vreg_addr()).

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Wang Yechao <wang.yechao255@zte.com.cn>
Signed-off-by: Yanteng Si <si.yanteng@linux.dev>

category: feature
bugzilla: RVCK-Project#320

--------------------------------

This reverts commit "riscv: config: enable dma driver for spacemit k1".

Following the upstream approach, both K1 and K3 will use the mmp_pdma driver,
so this configuration is not required.

Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

category: feature
bugzilla: RVCK-Project#320

--------------------------------

This reverts commit "driver: k1: add dma driver support for spacemit k1".

Following the upstream approach, both K1 and K3 will use the mmp_pdma driver,
no longer using the vendor driver.

Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit 39ce725
category: feature
bugzilla: RVCK-Project#320

--------------------------------

Add device tree binding documentation for the SpacemiT K1 PDMA
controller.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-1-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit 55620b1
category: feature
bugzilla: RVCK-Project#320

--------------------------------

Add the "spacemit,k3-pdma" compatible string for the SpacemiT K3 SoC.

While the K3 PDMA IP reuses most of the design found on the earlier
K1 SoC, a new compatible string is required because the DRCMR
(DMA Request/Command Register) base address for extended DMA request
numbers (>= 64) differs from the K1 implementation.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://patch.msgid.link/20260518-k3-pdma-v6-1-67fdf319a8f8@linux.spacemit.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit c0f0d93
category: feature
bugzilla: RVCK-Project#320

--------------------------------

The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.
To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new() which already returns void. Eventually after all drivers
are converted, .remove_new() is renamed to .remove().

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230919133207.1400430-26-u.kleine-koenig@pengutronix.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit c48de45
category: feature
bugzilla: RVCK-Project#320

--------------------------------

If probe is reached, we've already matched the device and in the case of
DT matching, the struct device_node pointer will be set. Therefore, there
is no need to call of_match_device() in probe.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231006213835.332848-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit e73a9a1
category: feature
bugzilla: RVCK-Project#320

--------------------------------

Add support for retrieving and enabling an optional clock during
mmp_pdma_probe(). It is optional because in Marvell devices
such as "marvell,pdma-1.0" the clocks property is not a required
property. But in SpacemiT K1 PDMA, "spacemit,k1-pdma" as the dt
binding schema file stated, clocks is required.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-2-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit fc72462
category: feature
bugzilla: RVCK-Project#320

Replace devm_reset_control_get_optional_exclusive_deasserted() with explicit
devm_reset_control_get_optional_exclusive() and reset_control_deassert() calls
for compatibility with Linux 6.6 kernels.

--------------------------------

Add support to acquire and deassert an optional hardware reset controller
during mmp_pdma_probe(). It is optional because in Marvell devices
such as "marvell,pdma-1.0" the resets property is not a required
property. But in SpacemiT K1 PDMA, "spacemit,k1-pdma" as the dt
binding schema file stated, resets is required.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-3-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit 35e40bf
category: feature
bugzilla: RVCK-Project#320

--------------------------------

Introduce mmp_pdma_ops structure to abstract 32-bit addressing operations
and enable support for different controller variants. This prepares for
adding 64-bit addressing support.

The ops structure includes:
- Hardware register operations (read/write DDADR, DSADR, DTADR)
- Descriptor memory operations (manipulate descriptor structs)
- Controller configuration (run bits, DMA mask)

Convert existing 32-bit operations to use the new abstraction layer
while maintaining backward compatibility.

Cc: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-4-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit 5cfe585
category: feature
bugzilla: RVCK-Project#320

--------------------------------

Add support for SpacemiT K1 PDMA controller which features 64-bit
addressing capabilities.

The SpacemiT K1 PDMA extends the descriptor format with additional
32-bit words for high address bits, enabling access to memory beyond
4GB boundaries. The new spacemit_k1_pdma_ops provides necessary 64-bit
address handling functions and k1 specific controller configurations.

Key changes:
- Add ARCH_SPACEMIT dependency to Kconfig
- Define new high 32-bit address registers (DDADRH, DSADRH, DTADRH)
- Add DCSR_LPAEEN bit for Long Physical Address Extension Enable
- Implement 64-bit operations for SpacemiT K1 PDMA

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250822-working_dma_0701_v2-v5-5-f5c0eda734cc@riscstar.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit 49400b7
category: feature
bugzilla: RVCK-Project#320

--------------------------------

The driver's existing logic for setting the DMA mask for "marvell,pdma-1.0"
was flawed. It incorrectly relied on pdev->dev->coherent_dma_mask instead
of declaring the hardware's fixed addressing capability. A cleaner and
more correct approach is to define the mask directly based on the hardware
limitations.

The MMP/PXA PDMA controller is a 32-bit DMA engine. This is supported by
datasheets and various dtsi files for PXA25x, PXA27x, PXA3xx, and MMP2,
all of which are 32-bit systems.

This patch simplifies the driver's logic by replacing the 'u64 dma_mask'
field with a simpler 'u32 dma_width' to store the addressing capability
in bits. The complex if/else block in probe() is then replaced with a
single, clear call to dma_set_mask_and_coherent(). This sets a fixed
32-bit DMA mask for "marvell,pdma-1.0" and a 64-bit mask for
"spacemit,k1-pdma," matching each device's hardware capabilities.

Finally, this change also works around a specific build error encountered
with clang-20 on x86_64 allyesconfig. The shift-count-overflow error is
caused by a known clang compiler issue where the DMA_BIT_MASK(n) macro's
ternary operator is not correctly evaluated in static initializers. By
moving the macro's evaluation into the probe() function, the driver avoids
this compiler bug.

Fixes: 5cfe585 ("dmaengine: mmp_pdma: Add SpacemiT K1 PDMA support with 64-bit addressing")
Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Closes: https://lore.kernel.org/lkml/CA+G9fYsPcMfW-e_0_TRqu4cnwqOqYF3aJOeKUYk6Z4qRStdFvg@mail.gmail.com
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Nathan Chancellor <nathan@kernel.org> # build
Tested-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit f46b476
category: feature
bugzilla: RVCK-Project#320

--------------------------------

Refactor the DRCMR macro into a helper function mmp_pdma_get_drcmr()
to support variable extended DRCMR base addresses across different PDMA
implementations, such as SpacemiT K3.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://patch.msgid.link/20260518-k3-pdma-v6-2-67fdf319a8f8@linux.spacemit.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit 6587b86
category: feature
bugzilla: RVCK-Project#320

--------------------------------

SpacemiT K3 reuses most of the PDMA IP design found on K1, with one
difference being the extended DRCMR base address. Add "spacemit,k3-pdma"
compatible string and define a new mmp_pdma_ops for K3 PDMA.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://patch.msgid.link/20260518-k3-pdma-v6-3-67fdf319a8f8@linux.spacemit.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

mainline inclusion
from mainline-7.2-rc1
commit 3f47ca8
category: feature
bugzilla: RVCK-Project#320

Added `interrupt-parent = <&saplic>;` to the PDMA node in k3.dtsi,
because the `soc` node in our v6.6 tree does not inherit the
interrupt controller context globally.

--------------------------------

Add the Peripheral DMA (PDMA) controller node for the SpacemiT K3 SoC.
The PDMA controller provides general-purpose DMA capabilities for various
peripheral devices across the system to offload CPU data transfers.

Unlike the previous K1 SoC, where some DMA masters had memory addressing
limitations (e.g. restricted to the 0-4GB space) requiring a dedicated
dma-bus with dma-ranges to restrict memory allocations, the K3 DMA masters
have full memory addressing capabilities. Therefore, the PDMA node is now
instantiated directly under the main soc bus.

Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://patch.msgid.link/20260518-k3-pdma-v6-4-67fdf319a8f8@linux.spacemit.com
Signed-off-by: Yixun Lan <dlan@kernel.org>
Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

category: feature
bugzilla: RVCK-Project#320

--------------------------------

Enable DMA support

Signed-off-by: Yongchao Jia <yongchao.jia@spacemit.com>

riscv: defconfig: Enable CONFIG_RTC_DRV_EFI config

Fix module load issue for R_RISCV_32_PCREL

…onfig

dist inclusion
category: cleanup
Link: RVCK-Project#251

--------------------------------

The RVCK kernel currently reuses the generic defconfig from
linux-6.6.y. Sharing this defconfig introduces potential risks,
such as missing relevant fix patches.

This patch simply duplicates the existing defconfig and renames
the copy to rvck_defconfig. No functional changes are introduced.

Signed-off-by: Yanteng Si <siyanteng@iscas.ac.cn>

dist inclusion
category: cleanup
Link: RVCK-Project#251

--------------------------------

RVCK is a unified RISC-V kernel project that integrates vendor-specific
downstream kernels from multiple manufacturers. It resolves
cross-vendor conflicts and maintains a single codebase capable of
booting all supported boards.

Introducing too many BSP-exclusive configs will gradually fragment the
unified codebase. This patch cleans up these redundant configurations.

Signed-off-by: Yanteng Si <siyanteng@iscas.ac.cn>

dist inclusion
category: cleanup
Link: RVCK-Project#251

--------------------------------

Restore all config files aligned with upstream linux-6.6.y.
The latest stable upstream tag at present is linux-6.6.143.

Signed-off-by: Yanteng Si <siyanteng@iscas.ac.cn>

config: 基于 linux-6.6.143 清理并标准化内核默认配置

riscv inclusion
category: config
bugzilla: RVCK-Project#351

--------------------------------

Enable VFIO and PCI device assignment support for RISC-V. The other
changes are generated automatically by savedefconfig.

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>